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 FSQ211 Green Mode Fairchild Power Switch (FPSTM)
April 2007
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Features
Internal Avalanche-Rugged SenseFET Precision Fixed Operating Frequency (67KHz) Burst-Mode Operation Internal Start-up Circuit Pulse-by-Pulse Current Limiting Overload Protection (OLP) Internal Thermal Shutdown Function (TSD) Auto-Restart Mode Under-Voltage Lockout (UVLO) with Hysteresis Built-in Soft-Start Secondary-Side Regulation
Description
The FSQ211 consists of an integrated Pulse Width Modulator (PWM) and SenseFET, specifically designed for high-performance, off-line Switch Mode Power Supplies (SMPS) with minimal external components. This device is an integrated high-voltage power switching regulator that combines a VDMOS SenseFET with a voltage mode PWM control block. The integrated PWM controller features include a fixed oscillator, Under Voltage Lockout (UVLO) protection, Leading Edge Blanking (LEB), an optimized gate turn-on/turn-off driver, Thermal Shutdown (TSD) protection, and temperature compensated precision-current sources for loop compensation and fault protection circuitry. When compared to a discrete MOSFET and controller or RCC switching converter solution, the FSQ211 device reduces total component count and design size and weight, while increasing efficiency, productivity, and system reliability. This device provides a basic platform well suited for cost-effective flyback converters.
Applications
Charger & Adapter for Mobile Phone, PDA, & MP3 Auxiliary Power for White Goods, PC, C-TV, & Monitor
Related Application Notes
AN-4137 Design Guidelines for Off-line Flyback Converters using FPSTM AN-4141 Troubleshooting and Design Tips for Fairchild Power Switch (FPSTM) Flyback Applications AN-4147 Design Guidelines for RCD Snubber of Flyback AN-4134Design Guidelines for Off-line Forward Converters using FPSTM AN-4138Design Considerations for Battery Charger Using Green Mode Fairchild Power Switch (FPSTM)
Ordering Information
Part Number
FSQ211 FSQ211L
Package
8DIP 8LSOP
Top Mark
Q211 Q211L
BVDSS
650V 650V
fOSC
67KHz 67KHz
RDS(ON)
18 18
FPSTM is a trademark of Fairchild Semiconductor Corporation (c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0 www.fairchildsemi.com
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Typical Application
AC IN
DC OUT
Vstr PWM Vfb
Drain
Vcc
GND
Figure 1.
Typical Flyback Application
Internal Block Diagram
Figure 2.
Functional Block Diagram of FSQ211
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 2
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Pin Assignments
GND Vcc Vfb NC 1 2 3 4 8 7 6 5 Drain Drain Drain Vstr
Figure 3.
Pin Configuration (Top View)
Pin Definitions
Pin
1 2
Name
GND VCC
Description
Ground. SenseFET source terminal on primary side and internal control ground. Positive supply voltage input. Although connected to an auxiliary transformer winding, current is supplied from pin 5 (Vstr) via an internal switch during startup (see Block Diagram). It is not until VCC reaches the UVLO upper threshold (9V), that the internal start-up switch opens and device power is supplied via the auxiliary transformer winding. Feedback. Inverts input to the PWM comparator with its normal input level between 0.5V and 2.5V. It has a 0.4mA current source connected internally, while a capacitor and opto-coupler are typically connected externally. A feedback voltage of 4.5V triggers overload protection (OLP). There is a time delay while charging external capacitor CFB from 3V to 4.5V using an internal 5A current source. This time delay prevents false triggering under transient conditions, but allows the protection mechanism to operate under true overload conditions. No Connection. Start-up. This pin connects directly to the rectified AC line voltage source. At start-up, the internal switch supplies internal bias and charges an external storage capacitor placed between the VCC pin and ground. Once the VCC reaches 9V, the internal switch stops charging the capacitor. SenseFET Drain. The drain pins are designed to connect directly to the primary lead of the transformer and are capable of switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance.
3
VFB
4 5
NC Vstr
6,7,8
Drain
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 3
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25C unless otherwise specified.
Symbol
VDRAIN VSTR VDG VGS VCC VFB PD TJ TA TSTG Drain Pin Voltage Vstr Pin Voltage Drain-Gate Voltage Gate-Source Voltage Supply Voltage
Parameter
Value
650 650 650 20 20 -0.3 to VSTOP 1.40 Internally limited -25 to +85 -55 to +150
Unit
V V V V V V W C C C
Feedback Voltage Range Total Power Dissipation Operating Junction Temperature Operating Ambient Temperature Storage Temperature
Notes: 1. Repetitive rating: Pulse width is limited by maximum junction temperature. 2. L = 24mH, starting TJ = 25C.
Thermal Impedance
TA=25C unless otherwise specified.
Symbol
8DIP JA JC
Parameter
Junction-to-Ambient Thermal Impedance Junction-to-Case Thermal Impedance
(4) (3)
Value
89 14
Unit
C/W C/W
Notes: 3. Free standing with no heatsink; without copper clad. Measurement condition - Just before junction temperature TJ enters into OTP. 4. Measured on the DRAIN pin close to plastic interface. 5. All items are tested with the JEDEC standards: JESD 51-2 and 51-10 (DIP).
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 4
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Electrical Characteristics
TA=25C unless otherwise specified,
Symbol SENSEFET SECTION
Parameter
Conditions
VDS=650V, VGS=0V
Min.
Typ.
Max.
25 200
Unit
IDSS RDS(ON) gfs CISS COSS CRSS fOSC fOSC DMAX VSTART VSTOP IFB tS/S VBURH VBURL VBUR(HYS)
Zero-Gate-Voltage Drain Current Drain-Source On-State Resistance(6) Forward Trans-Conductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
VDS=520V, VGS=0V, TC=125C VGS=10V, ID=0.2A VDS=50V, ID=0.2A VGS=0V, VDS=25V, f=1MHz 1.0 18 1.3 162 18 3.8
A S pF
25
CONTROL SECTION Switching Frequency Switching Frequency Variation Maximum Duty Cycle UVLO Threshold Voltage Feedback Source Current Internal Soft-Start Time VFB=GND VFB=GND 0V VFB 3V
(7)
61 -25C TA 85C 60 8 6 0.35 10
67 5 67 9 7 0.40 15
73 10 74 10 8 0.45 20
KHz % % V V mA ms
BURST-MODE SECTION Burst-Mode Voltage TJ=25C Hysteresis 0.6 0.45 0.7 0.55 150 0.8 0.65 V V mV
PROTECTION SECTION ILIM TSD VSD IDELAY IOP ICH Peak Current Limit Thermal Shutdown Temperature Shutdown Feedback Voltage Shutdown Delay Current 3V VFB VSD VCC 16V VCC=0V , VSTR=50V 450
(8)
di/dt= 65mA/s
0.32 125 4.0 4
0.38 145 4.5 5
0.44 5.0 6
A C V A
TOTAL DEVICE SECTION Operating Supply Current (control part only) Start-Up Charging Current 1.5 550 3.0 650 mA A
Notes: 6. Pulse test: Pulse width 300us, duty 2%. 7. These parameters, although guaranteed, are tested in EDS (wafer test) process. 8. These parameters, although guaranteed, are not 100% tested in production.
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 5
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Typical Performance Characteristics
These characteristic graphs are normalized at TA = 25C.
1.15 1.10 1.05
1.15 1.10 1.05
VREF
0.95 0.90 0.85 -50 0 50 100 150
IOP
1.00
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Temperature [C]
Figure 4.
Reference Voltage (VREF) vs. TA
Figure 5.
Operating Supply Current (IOP) vs. TA
1.15 1.10 1.05
1.15 1.10 1.05
VSTAART
1.00 0.95 0.90 0.85 -50 0 50 100 150
VSTOP
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Temperature [C]
Figure 6.
Start Threshold Voltage (VSTART) vs. TA
Figure 7.
Stop Threshold Voltage (VSTOP) vs. TA
1.15 1.10 1.05 1.00 0.95 0.90 0.85 -50 0 50 100 150
1.15 1.10 1.05
DMAX
fOSC
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Temperature [C]
Figure 8.
Operating Frequency (fOSC) vs. TA
Figure 9.
Maximum Duty Cycle (DMAX) vs. TA
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 6
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Typical Performance Characteristics (Continued)
These characteristic graphs are normalized at TA = 25C.
1.15 1.10 1.05
1.15 1.10 1.05
ILIM
1.00 0.95 0.90 0.85 -50 0 50 100 150
IFB
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Temperature [C]
Figure 10. Peak Current Limit (ILIM) vs. TA
Figure 11. Feedback Source Current (IFB) vs. TA
1.15 1.10 1.05
1.15 1.10 1.05
IDELAY
1.00 0.95 0.90 0.85 -50 0 50 100 150
VSD
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Temperature [C]
Figure 12. Shutdown Delay Current (IDELAY) vs. TA
Figure 13. Shutdown Feedback Voltage (VSD) vs. TA
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 7
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Functional Description
1. Start-up: At start-up, the internal high-voltage current source supplies the internal bias and charges the external VCC capacitor, as shown in Figure 14. In the case of the FSQ211, when VCC reaches 9V, the device starts switching and the internal high-voltage current source stops charging the capacitor. The device is in normal operation provided VCC does not drop below 7V. After start-up, the bias is supplied from the auxiliary transformer winding.
VIN ,dc ISTR Vstr Vcc
L
2. Feedback Control: The FSQ211 is a voltage-mode controlled device, as shown in Figure 16. Usually, an opto-coupler and shunt regulator, like KA431, are used to implement the feedback network. The feedback voltage is compared with an internally generated sawtooth waveform. This directly controls the duty cycle. When the shunt regulator reference pin voltage exceeds the internal reference voltage of 2.5V, the opto-coupler LED current increases, the feedback voltage VFB is pulled down, and it reduces the duty cycle. This happens when the input voltage increases or the output load decreases.
Vcc 5A Vref 0.40mA Gate driver + VFB R
OSC
Vo
H 9V/7V
KA43 1
V fb
C fb
4
-
V SD
OLP
Figure 14. Internal Start-up Circuit Calculating the VCC capacitor is an important step in a design with the FSQ211. At initial start-up, the maximum value of start operating current ISTR is about 100A, which supplies current to UVLO and VREF blocks. The charging current IVCC of the VCC capacitor is equal to ISTR - 100A. After VCC reaches the UVLO start voltage, only the bias winding supplies VCC current to the device. When the bias winding voltage is not sufficient, the VCC level decreases to the UVLO stop voltage and the internal current source is activated again to charge the VCC capacitor. To prevent this VCC fluctuation (charging/discharging), the VCC capacitor should be chosen with a value between 10F and 47F.
VIN, dc ISTR IVcc = ISTR-ISTART IVcc = ISTR-ISTART VCC ISTART Vstr J-FET
Figure 16. PWM and Feedback Circuit 3. Leading Edge Blanking (LEB): The instant the internal SenseFET is turned on, the primary-side capacitance and secondary-side rectifier diode reverse recovery typically cause a high-current spike through the SenseFET. Excessive voltage across the RSENSE resistor leads to incorrect pulse-by-pulse current limit protection. To avoid this, a leading edge blanking (LEB) circuit disables the pulse-by-pulse current limit protection block for a fixed time (tLEB) after the SenseFET turns on. 4. Protection Circuit: The FSQ211 has several protective functions, such as overload protection (OLP), under-voltage lockout (UVLO), and thermal shutdown (TSD). Because these protection circuits are fully integrated inside the IC without external components, reliability is improved without increasing costs. Once a fault condition occurs, switching is terminated and the SenseFET remains off. This causes VCC to fall. When VCC reaches the UVLO stop voltage VSTOP (7V), the protection is reset and the internal high-voltage current source charges the VCC capacitor via the Vstr pin. When VCC reaches the UVLO start voltage VSTART (9V), the device resumes normal operation. In this manner, the auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated.
OSC
UVLO VREF
VCC
VSTART
UVLO
VCC must not drop below VSTOP
VSTOP Bias winding voltage t
V fb
4
5A
400A
+ -
S R
Q
GATE DR IVER
R
C fb
OLP S RESE T 4.5V Q
Figure 15. Charging VCC Capacitor Through Vstr
TSD
R A/R
OLP , TSD Protection Block
Figure 17. Protection Block
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0 www.fairchildsemi.com 8
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
4.1 Overload Protection (OLP): Overload is defined as the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should be activated to protect the SMPS. However, even when the SMPS is operating normally, the overload protection (OLP) circuit can be activated during the load transition. To avoid this undesired operation, the OLP circuit is designed to be activated after a specified time to determine whether it is a transient situation or an overload situation. If the output consumes more than the maximum power determined by ILIM, the output voltage (VO) decreases below its rating voltage. This reduces the current through the opto-coupler LED, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (VFB). If VFB exceeds 3V, the feedback input diode is blocked and the 5A current source (IDELAY) starts to charge CFB slowly up to VCC. In this condition, VFB increases until it reaches 4.5V, when the switching operation is terminated, as shown in Figure 18. Shutdown delay is the time required to charge CFB from 3V to 4.5V with 5A current source.
VFB Overload Protection 4.5V
Drain current ILIM 2.14ms 7steps
t
Figure 19. Internal Soft-Start 6. Burst Operation: To minimize the power dissipation in standby mode, the FSQ211 enters burst mode operation. As the load decreases, the feedback voltage decreases. The device automatically enters burst mode when the feedback voltage drops below VBURL (0.55V). At this point, switching stops and the output voltages start to drop. This causes the feedback voltage to rise. Once is passes VBURH (0.70V), switching starts again. The feedback voltage falls and the process repeats. Burst mode operation alternately enables and disables switching of the power MOSFET to reduce the switching loss in the standby mode.
OSC
S 5A 4 400A R on/off Q GATE DR IVE R
3V
V fb
t12= CFBx(V(t2)-V(t1)) / IDELAY t1
t12 = CFB V (t2 ) * V (t1 ) ; I DELAY
t2
t
0.70V /0.55V Burst Operation Block
I DELAY =5 m , V (t1) = 3V, V (t2 ) = 4.5 A V
Vo
Voset
Figure 20. Burst Operation Block
Figure 18. Overload Protection (OLP) 4.2 Thermal Shutdown (TSD): The SenseFET and the control IC are integrated, making it easier for the control IC to detect the temperature of the SenseFET. When the temperature exceeds approximately 145C, thermal shutdown is activated. 5. Soft-Start: The FPS has an internal soft-start circuit that slowly increases the feedback voltage, together with the SenseFET current, right after it starts up. The typical soft-start time is 15ms, as shown in Figure 19, where progressive increment of the SenseFET current is allowed during the start-up phase. Soft-start circuit progressively increases current limits to establish proper working conditions for transformers, inductors, capacitors, and switching device. It also helps prevent transformer saturation and reduces the stress on the secondary diode.
V FB
0.7V 0.55V
Ids
V ds
t
Figure 21. Burst Operation Function
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 9
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Application Tips
Methods of Reducing Audible Noise
Switching mode power converters have electronic and magnetic components that generate audible noises when the operating frequency is in the range of 20~20,000Hz. Even though they operate above 20kHz, they can make noise depending on the load condition. Designers can employ several methods to reduce noise. Glue or Varnish The most common method involves using glue or varnish to tighten magnetic components. The motion of core, bobbin and coil, and the chattering or magnetostriction of core, can cause the transformer to produce audible noise. The use of rigid glue and varnish helps reduce the transformer noise, but can crack the core. This is because sudden changes in the ambient temperature cause the core and the glue to expand or shrink at a different rate. Ceramic Capacitor Using a film capacitor instead of a ceramic capacitor as a snubber capacitor is another noise-reduction option. Some dielectric materials show a piezoelectric effect, depending on the electric field intensity. Therefore, a snubber capacitor becomes one of the most significant sources of audible noise. It is possible to use a Zener clamp circuit instead of an RCD snubber for higher efficiency as well as lower audible noise. Adjusting Sound Frequency Moving the fundamental frequency of noise out of 2~4kHz range is the third method. Generally, humans are more sensitive to noise in the range of 2~4kHz. When the fundamental frequency of noise is located in this range, the noise is perceived as louder, although the noise intensity level is identical (refer to Figure 22 Equal Loudness Curves). When FPS acts in burst mode and the burst operation is suspected to be a source of noise, this method may be helpful. If the frequency of burst-mode operation lies in the range of 2~4kHz, adjusting the feedback loop can shift the burst operation frequency. To reduce the burst operation frequency, increase a feedback gain capacitor (CF), opto-coupler supply resistor (RD), and feedback capacitor (CB), and decrease a feedback gain resistor (RF), as shown in Figure 23.
Figure 22. Equal Loudness Curves
Figure 23. Typical Feedback Network of FPSTM
Other Reference Materials
AN-4134: Design Guidelines for Off-line Forward Converters Using Fairchild Power Switch (FPSTM) AN-4137: Design Guidelines for Off-line Flyback Converters Using Fairchild Power Switch (FPSTM) AN-4138: Design Considerations for Battery Charger Using Green Mode Fairchild Power Switch (FPSTM) AN-4140: Transformer Design Consideration for Off-line Flyback Converters Using Fairchild Power Switch (FPSTM) AN-4141: Troubleshooting and Design Tips for Fairchild Power Switch (FPSTM) Flyback Applications AN-4147: Design Guidelines for RCD Snubber of Flyback AN-4148: Audible Noise Reduction Techniques for FPSTM Application
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 10
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 24. 8-Lead Dual In-line Package (DIP)
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 11
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 25. 8-Lead LSOP
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 12
FSQ211 Green Mode Fairchild Power Switch (FPSTM)
(c) 2007 Fairchild Semiconductor Corporation FSQ211 Rev. 1.0.0
www.fairchildsemi.com 13


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